The present invention is directed, in general, to a communication device and, more specifically, to an optoelectronic device and method of manufacture thereof.
One common structure currently employed in optoelectronic devices is the p-i-n (PIN) device. In a typical PIN device, an intrinsic layer is disposed between a p-type layer and a n-type layer, forming a heterostructure device. The intrinsic layer has a larger index of refraction than the p and n layers, resulting in a natural waveguide. Furthermore, the energy band discontinuities in the conduction and valence bands in the PIN device facilitate carrier confinement within the active layer. In short, the PIN device is well suited for a variety of emitting and detecting optoelectronic device applications.
Presently, it is common for PIN devices to be formed as buried PIN structures. In such devices, a mesa strip is formed out of the traditional PIN device, and thereafter, blocking layers are positioned on the sides of the mesa strip. Often, the blocking layers are doped with impurity ions, such as iron, ruthenium or titanium, to form semi-insulating blocking layers. It has been found that the addition of iron-impurity ions increases the resistivity of the blocking layers and reduces the leakage current that typically occurs at the interface between the PIN device and the blocking layers. After the blocking layers have been formed, it is common for a P-type (zinc) doped cladding layer to be formed thereover, thus forming a capped-mesa buried heterostructure (CMBH).
A problem arises in those CMBH structures, in that the iron doped blocking layers are in contact with the zinc doped cladding layer, and the zinc and iron inter-diffuse when subjected to high temperatures. This inter-diffusion, tends to increase the device""s current leakage and parasitic capacitance, both of which are very undesirable.
One approach the optoelectronic industry attempted to reduce this inter-diffusion, was to form an undoped setback layer between the doped cladding layer and the blocking layers. While the undoped setback layer reduced, or substantially eliminated, the aforementioned inter-diffusion, it misplaced the position of the p-n junction. Other approaches were also attempted, however, each of those approaches was equally unsuccessful.
Accordingly, what is needed in the art is an optoelectronic device, and a method of manufacture therefor, that does not experience the drawbacks experienced by the devices disclosed above. Namely, a device that does not experience the inter-diffusion issues is desired.
To address the above-discussed deficiencies of the prior art, the present invention provides an optoelectronic device and a method of manufacture thereof. In one embodiment, the method of manufacturing the optoelectronic device may include creating a multilayered optical substrate and then forming a self aligned dual mask over the multilayered optical substrate. The method may further include etching the multilayered optical substrate through the self aligned dual mask to form a mesa structure.
The foregoing has outlined preferred and alternative features of the present invention so that those skilled in the art may better understand the detailed description of the invention that follows. Additional features of the invention will be described hereinafter that form the subject of the claims of the invention. Those skilled in the art should appreciate that they can readily use the disclosed conception and specific embodiment as a basis for designing or modifying other structures for carrying out the same purposes of the present invention. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the invention.